branch target造句
例句與造句
- the operand is a 32-bit integer branch target
該操作數(shù)為32位整數(shù)分支目標。 - the operand is an 8-bit integer branch target
該操作數(shù)為8位整數(shù)分支目標。 - btac branch target address calculator
分支目標尋址計算器 - btb c : branch target buffer cache
分支目標緩沖 - the fetcher also generates a search address for output to the branch target buffer
指令讀取器亦產(chǎn)生搜尋位址輸出至分支目標緩沖器中。 - It's difficult to find branch target in a sentence. 用branch target造句挺難的
- second, trace preconstruction based on branch target profiling mechanism ( tpbtp ) is proposed
基于分支目標提取的trace預(yù)構(gòu)??tpbtp機制。 - the branch target buffer is provided with a tag ram that is organized in a set associative fashion
分支目標緩沖器提供一個架構(gòu)成集合相關(guān)式的標簽記憶體。 - a processor architecture is disclosed including a fetcher, packet unit and branch target buffer
母案摘要:揭露一種包含指令取器、封裝單元及分支目標緩沖器的處理器架構(gòu)。 - branch instructions using the contents of the link register or count register to specify the branch target address
使用鏈接寄存器或計數(shù)寄存器來指定轉(zhuǎn)移目標地址的轉(zhuǎn)移指令。 - btb branch target buffer . this block is responsible for dynamic branch prediction based on the history of past branch decisions paths
分支目標緩存器。此塊基于過去分支決策路徑的歷史，負責(zé)動態(tài)分支預(yù)定過程。 - that is, the branch target address is the value of the immediate field or is the sum of the value of the immediate field and the address of the branch
換名話說，轉(zhuǎn)移目標地址是立即字段的值，還是立即字段的值與轉(zhuǎn)移地址的和。 - this paper proposes a power-aware branch predictor, which is based on the gshare predictor, by accessing the btb branch target buffer selectively
本文提出的是一個功耗敏感型的分枝預(yù)測器，它是基于gshare的一個有選擇性訪問btb的預(yù)測器。 - tpbtp mechanism evaluates branch target from a direct branch in advance, so to make up the insufficiency of branch predictor and branch target buffer, and constructs instruction traces before program execution
tpbtp機制從直接分支指令中提取目標地址，彌補分支預(yù)測和分支目標緩存的不足，加速指令讀取，實現(xiàn)trace預(yù)構(gòu)。 - tpbtp mechanism evaluates branch target from a direct branch in advance, so to make up the insufficiency of branch predictor and branch target buffer, and constructs instruction traces before program execution
tpbtp機制從直接分支指令中提取目標地址，彌補分支預(yù)測和分支目標緩存的不足，加速指令讀取，實現(xiàn)trace預(yù)構(gòu)。 - in response to the branch target buffer detecting a taken branch that crosses multiple cache blocks, the fetch address is increased so that it points to the next cache block to be fetched but the search address is maintained the same
分支目標緩沖器會查出是否有預(yù)測會發(fā)生的分支指令跨過多個快取區(qū)塊，則讀取位址會指到下一個快取區(qū)塊而搜尋位址則會保持不變。